The 3-years 2D-SIPC project consists of 6 work packages (WPs).

WP1 (Project Management), led by ICFO, which contains all administrative and scientific project planning. Towards the end of the project, opportunities for follow-up projects and exploitations will be evaluated, with input from all WPs and with strong emphasis on deploying of technologies and identifying of potential commercial partners.

WP2 (Design and prototyping novel 2DM platforms) covers the development of computational models and theoretical prediction of novel 2DMs and HSs properties, as well as the experimental realization of these devices. As a first step, the most promising materials for the various quantum applications will be identified, assembled into prototype devices and extensively characterized. Successful devices, concepts and theories will be then transferred to other WPs for their further engineering into quantum devices and their integration into photonic IQNs. In addition, the WP will develop large scale synthesis of the most successful 2DM HSs for their scalable assembly into device arrays.

WP3 (Single photon generation) covers the deterministic creation of SPE arrays, opto-electronic characterization and theoretical modelling of the fundamental properties of SPEs in 2DMs and HSs, which were developed in WP2. This WP will also work towards the improvement of the specifications of the SPEs characteristic quantum emission properties, such as linewidths, lifetimes, entanglement and electric field control. Devices, concepts and theories will be evaluated, and the most promising ones will be transferred to WP4 and WP6 for IPC integration and benchmarking of the SPEs with state-of-the-art commercial SPEs.

WP4 (Single photon processing) covers the build-up of on-chip single photon processing devices for control and routing of single photon in IPCs. These involve waveguide integrated optical modulators and phase-shifters. After successful deterministic creation of SPE arrays in WP3, these will be used in this WP to create waveguide integrated arrays for non-linear single photon gates. Most successful devices concepts and theories will be then transferred to WP6 for benchmarking and the integration into on-chip quantum networks.

WP5 (Single photon detection) will develop scalable, photonics integrated SPDs from 2DMs. Starting from the engineering of novel intrinsic superconducting and
proximity effects in 2DMs, the WP will build-up novel SPD device concepts. The team will characterize the properties of these devices with RF and opto-electronic techniques, and will optimize these to achieve the best performance characteristics, such as DCR, QEs, dead and jitter times. The WP will transfer its devices to WP6 for benchmarking of the SPDs state-of-the-art commercial SPDs and integrate these on-chip with components demonstrated in other WPs to show on chip quantum logic operations.

WP6 (Benchmarking and exploitation) will prototype devices developed by all other WPs. These will be mounted in industrial cryostats at Single Quantum and benchmarked following a specific protocol. Detection efficiencies, time resolution and dark counts will be thoroughly studied. The end result will be an evaluation of the industrial potentials of the new technologies. Finally, all-optical on-chip quantum processing will be demonstrated on the developed IQNs.